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xPCB Layout - Version 116.0.506.6099
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Job Directory:        D:\job\Compulab\FC-4USB-v. 1.0\PCB\

Design Status Report: D:\job\Compulab\FC-4USB-v. 1.0\PCB\LogFiles\DesignStatus_03.txt

Thu Sep 14 12:00:16 2017

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DESIGN STATUS
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Board Size Extents  ............ 3.84 X 1.78 (in)
Route Border Extents  .......... 3.79 X 1.73 (in)
Actual Board Area  ............. 4.99 (in)
Actual Route Area  ............. 4.72 (in)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    9.99 Sq. (in)     1.28 Sq. (in)     12.78 %

Pins  .......................... 279
Pins per Route Area  ........... 59.14 Pins/Sq. (in)

Layers  ........................ 6
    Layer 1 is a signal layer
        Trace Widths  .......... None.
    Layer 2 is a Positive Plane Layer with nets
        GND
        Trace Widths  .......... None.
    Layer 3 is a signal layer
        Trace Widths  .......... None.
    Layer 4 is a signal layer
        Trace Widths  .......... None.
    Layer 5 is a Positive Plane Layer with nets
        (Shield Area)
        Trace Widths  .......... None.
    Layer 6 is a signal layer
        Trace Widths  .......... None.

Nets  .......................... 55
Connections  ................... 175
Open Connections  .............. 155
Differential Pairs  ............ 0
Percent Routed  ................ 11.43 %

Netline Length  ................ 50.84 (in)
Netline Manhattan Length  ...... 58.64 (in)
Total Trace Length  ............ 0 (in)

Trace Widths Used (th)  ........ None.
Vias  .......................... 0

Teardrops....................... 0
    Pad Teardrops............... 0
    Trace Teardrops............. 0
    Custom Teardrops............ 0
Tracedrops...................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 70
    Parts Mounted on Top  ...... 68
        SMD  ................... 54
        Through  ............... 4
        Test Points  ........... 0
        Mechanical  ............ 10
    Parts Mounted on Bottom  ... 1
        SMD  ................... 1
        Through  ............... 0
        Test Points  ........... 0
        Mechanical  ............ 0
    Embedded Components ........ 0
        Capacitors ............. 0
        Resistors .............. 0
    RF Shapes .................. 0

    Edge Connector Parts  ...... 1

Parts not Placed  .............. 0

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 33
    Holes per Board Area  ...... 6.61 Holes/Sq. (in)
Mounting Holes  ................ 5

Wirebonds
    Bondpads ................... 0
    Bond Wires ................. 0