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xPCB Layout - Version 116.0.506.6156
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Job Directory:        D:\Job\Compulab VX.2\TENSOR-ACC-RIB20\PCB\

Design Status Report: D:\Job\Compulab VX.2\TENSOR-ACC-RIB20\PCB\LogFiles\DesignStatus_01.txt

Mon May 20 07:18:43 2019

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DESIGN STATUS
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Board Size Extents  ............ 75.7 X 215 (mm)
Route Border Extents  .......... 24.511 X 205 (mm)
Actual Board Area  ............. 16,275.5 (mm)
Actual Route Area  ............. 5,024.755 (mm)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    32,551 Sq. (mm)   234.624 Sq. (mm)  0.72 %

Pins  .......................... 134
Pins per Route Area  ........... 0.027 Pins/Sq. (mm)

Layers  ........................ 4
    Layer 1 is a signal layer
        Trace Widths  .......... 0.102, 0.203, 0.254, 0.301, 0.305
    Layer 2 is a signal layer
        Trace Widths  .......... 0.047, 0.048, 0.051, 0.06, 0.102
    Layer 3 is a signal layer
        Trace Widths  .......... None.
    Layer 4 is a signal layer
        Trace Widths  .......... 0.102, 0.203, 0.254, 0.301, 0.305

Nets  .......................... 36
Connections  ................... 113
Open Connections  .............. 0
Differential Pairs  ............ 12
Differential Pair Names:   PCIE_CLKN   PCIE_CLKP
                           PCIE_RX0N   PCIE_RX0P
                           PCIE_RX1N   PCIE_RX1P
                           PCIE_RX2N   PCIE_RX2P
                           PCIE_RX3N   PCIE_RX3P
                           PCIE_TX0N   PCIE_TX0P
                           PCIE_TX1N   PCIE_TX1P
                           PCIE_TX2N   PCIE_TX2P
                           PCIE_TX3N   PCIE_TX3P
                           RSVD_DIFF1_N   RSVD_DIFF1_P
                           RSVD_DIFF2_N   RSVD_DIFF2_P
                           USB2_N   USB2_P
                           
Percent Routed  ................ 100.00 %

Netline Length  ................ 0 (mm)
Netline Manhattan Length  ...... 0 (mm)
Total Trace Length  ............ 6,668.136 (mm)

Trace Widths Used (mm)  ........ 0.047, 0.048, 0.051, 0.06, 0.102, 0.203, 0.254, 0.301, 0.305
Vias  .......................... 146
Via Span  Name                   Quantity
   1-4    VIA8_pad16             146

Teardrops....................... 0
    Pad Teardrops............... 0
    Trace Teardrops............. 0
    Custom Teardrops............ 0
Tracedrops...................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 2
    Parts Mounted on Top  ...... 0
        SMD  ................... 0
        Through  ............... 0
        Test Points  ........... 0
        Mechanical  ............ 0
    Parts Mounted on Bottom  ... 0
        SMD  ................... 0
        Through  ............... 0
        Test Points  ........... 0
        Mechanical  ............ 0
    Embedded Components ........ 0
        Capacitors ............. 0
        Resistors .............. 0
    RF Shapes .................. 0

    Edge Connector Parts  ...... 2

Parts not Placed  .............. 0

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 146
    Holes per Board Area  ...... 0.009 Holes/Sq. (mm)
Mounting Holes  ................ 0

Wirebonds
    Bondpads ................... 0
    Bond Wires ................. 0