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xPCB Layout - Version 116.0.506.6156
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Job Directory:        E:\Compulab VX.2\FT-SER4_V1.1\PCB\

Design Status Report: E:\Compulab VX.2\FT-SER4_V1.1\PCB\LogFiles\DesignStatus_02.txt

Tue Jul 14 10:16:30 2020

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DESIGN STATUS
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Board Size Extents  ............ 33.25 X 41.854 (mm)
Route Border Extents  .......... 33.05 X 40.838 (mm)
Actual Board Area  ............. 1,352.651 (mm)
Actual Route Area  ............. 1,277.924 (mm)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    2,705.302 Sq. (mm)1,697.133 Sq. (mm)62.73 %

Pins  .......................... 845
Pins per Route Area  ........... 0.661 Pins/Sq. (mm)

Layers  ........................ 6
    Layer 1 is a signal layer
        Trace Widths  .......... None.
    Layer 2 is a Positive Plane Layer with nets
        GND
        Trace Widths  .......... None.
    Layer 3 is a signal layer
        Trace Widths  .......... None.
    Layer 4 is a signal layer
        Trace Widths  .......... None.
    Layer 5 is a Positive Plane Layer with nets
        +3V3S
        Trace Widths  .......... None.
    Layer 6 is a signal layer
        Trace Widths  .......... None.

Nets  .......................... 176
Connections  ................... 515
Open Connections  .............. 498
Differential Pairs  ............ 1
Differential Pair Names:   USB2N   USB2P
                           
Percent Routed  ................ 3.30 %

Netline Length  ................ 4,518.453 (mm)
Netline Manhattan Length  ...... 5,660.019 (mm)
Total Trace Length  ............ 0 (mm)

Trace Widths Used (mm)  ........ None.
Vias  .......................... 0

Teardrops....................... 0
    Pad Teardrops............... 0
    Trace Teardrops............. 0
    Custom Teardrops............ 0
Tracedrops...................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 173
    Parts Mounted on Top  ...... 92
        SMD  ................... 82
        Through  ............... 0
        Test Points  ........... 0
        Mechanical  ............ 10
    Parts Mounted on Bottom  ... 81
        SMD  ................... 81
        Through  ............... 0
        Test Points  ........... 0
        Mechanical  ............ 0
    Embedded Components ........ 0
        Capacitors ............. 0
        Resistors .............. 0
    RF Shapes .................. 0

    Edge Connector Parts  ...... 0

Parts not Placed  .............. 36

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 4
    Holes per Board Area  ...... 0.003 Holes/Sq. (mm)
Mounting Holes  ................ 4

Wirebonds
    Bondpads ................... 0
    Bond Wires ................. 0