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xPCB Layout - Version 116.0.506.6156
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Job Directory:        E:\Compulab VX.2\FT_Q-CAN\PCB\

Design Status Report: E:\Compulab VX.2\FT_Q-CAN\PCB\LogFiles\DesignStatus_04.txt

Wed Mar 25 14:46:20 2020

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DESIGN STATUS
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Board Size Extents  ............ 33.25 X 36.109 (mm)
Route Border Extents  .......... 33.05 X 35.086 (mm)
Actual Board Area  ............. 1,161.651 (mm)
Actual Route Area  ............. 1,092.527 (mm)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    2,323.302 Sq. (mm)1,081.416 Sq. (mm)46.55 %

Pins  .......................... 293
Pins per Route Area  ........... 0.268 Pins/Sq. (mm)

Layers  ........................ 4
    Layer 1 is a signal layer
        Trace Widths  .......... 0.114, 0.178, 0.203, 0.254, 0.305, 0.457, 0.5, 0.508
    Layer 2 is a Positive Plane Layer with nets
        GND
        CAN_GND
        Trace Widths  .......... None.
    Layer 3 is a Positive Plane Layer with nets
        +3V3
        CAN_3V3
        Trace Widths  .......... None.
    Layer 4 is a signal layer
        Trace Widths  .......... 0.114, 0.178, 0.203, 0.254, 0.457, 0.508

Nets  .......................... 39
Connections  ................... 183
Open Connections  .............. 0
Differential Pairs  ............ 1
Differential Pair Names:   USB2_N   USB2_P
                           
Percent Routed  ................ 100.00 %

Netline Length  ................ 0 (mm)
Netline Manhattan Length  ...... 0 (mm)
Total Trace Length  ............ 509.707 (mm)

Trace Widths Used (mm)  ........ 0.114, 0.178, 0.203, 0.254, 0.305, 0.457, 0.5, 0.508
Vias  .......................... 134
Via Span  Name                   Quantity
   1-4    VIA8_pad18_sm top,bott 3
          VIA8_pad18             131

Teardrops....................... 0
    Pad Teardrops............... 0
    Trace Teardrops............. 0
    Custom Teardrops............ 0
Tracedrops...................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 66
    Parts Mounted on Top  ...... 31
        SMD  ................... 20
        Through  ............... 1
        Test Points  ........... 0
        Mechanical  ............ 10
    Parts Mounted on Bottom  ... 35
        SMD  ................... 35
        Through  ............... 0
        Test Points  ........... 0
        Mechanical  ............ 0
    Embedded Components ........ 0
        Capacitors ............. 0
        Resistors .............. 0
    RF Shapes .................. 0

    Edge Connector Parts  ...... 0

Parts not Placed  .............. 0

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 142
    Holes per Board Area  ...... 0.122 Holes/Sq. (mm)
Mounting Holes  ................ 6

Wirebonds
    Bondpads ................... 0
    Bond Wires ................. 0