
                                 BackAnnotation
                                 --------------

                          09:30 AM Monday, May 25, 2020
               Job Name: E:\Compulab\ FT.S-GPIO\PCB\FT_S-GPIO .pcb


  Updating Logic Database...

     Version:  99.00.05

     Writing a list of routed plane pins to Logic\rtdplane.caf.

     Finished updating the Logic Database.

     Updating LogicDB Version from 2 to 3.

     Creating a formatted Schematic Netlist (LogFiles\AfterBakAnnoNetlist.txt)...
     A formatted Schematic Netlist has been created.

            Creating a new Keyin Netlist (E:\Compulab\ FT.S-GPIO\PCB\Logic\FT_S-GPIO.kyn)
            from the Logic Database (Work\Layout_Temp\LogicDB.lgc)...
  A new Keyin Netlist has been generated.

     Completed Back Annotation
