
                                 BackAnnotation
                                 --------------

                      05:56 PM Wednesday, February 17, 2021
        Job Name: D:\Compulab VX.2\FT-POE2-rev1.1\PCB\FT-POE2-rev1.1.pcb


  Updating Logic Database...

     Version:  99.00.05

     Writing a list of routed plane pins to Logic\rtdplane.caf.

     Finished updating the Logic Database.

     Updating LogicDB Version from 1 to 2.

     Creating a formatted Schematic Netlist (LogFiles\AfterBakAnnoNetlist.txt)...
     A formatted Schematic Netlist has been created.

            Creating a new Keyin Netlist (D:\Compulab VX.2\FT-POE2-rev1.1\PCB\Logic\FT-POE2_REV1_1.kyn)
            from the Logic Database (Work\Layout_Temp\LogicDB.lgc)...
  A new Keyin Netlist has been generated.

     Completed Back Annotation
